src/Emu/PPC64Linux/PPC64Decoder.cpp

説明を見る。
00001 // 
00002 // Copyright (c) 2005-2008 Kenichi Watanabe.
00003 // Copyright (c) 2005-2008 Yasuhiro Watari.
00004 // Copyright (c) 2005-2008 Hironori Ichibayashi.
00005 // Copyright (c) 2008-2009 Kazuo Horio.
00006 // Copyright (c) 2009-2013 Naruki Kurata.
00007 // Copyright (c) 2005-2013 Ryota Shioya.
00008 // Copyright (c) 2005-2013 Masahiro Goshima.
00009 // 
00010 // This software is provided 'as-is', without any express or implied
00011 // warranty. In no event will the authors be held liable for any damages
00012 // arising from the use of this software.
00013 // 
00014 // Permission is granted to anyone to use this software for any purpose,
00015 // including commercial applications, and to alter it and redistribute it
00016 // freely, subject to the following restrictions:
00017 // 
00018 // 1. The origin of this software must not be misrepresented; you must not
00019 // claim that you wrote the original software. If you use this software
00020 // in a product, an acknowledgment in the product documentation would be
00021 // appreciated but is not required.
00022 // 
00023 // 2. Altered source versions must be plainly marked as such, and must not be
00024 // misrepresented as being the original software.
00025 // 
00026 // 3. This notice may not be removed or altered from any source
00027 // distribution.
00028 // 
00029 // 
00030 
00031 
00032 #include <pch.h>
00033 
00034 #include "Emu/PPC64Linux/PPC64Decoder.h"
00035 
00036 #include "SysDeps/Endian.h"
00037 #include "Emu/Utility/DecoderUtility.h"
00038 
00039 // References:
00040 //   PowerISA, http://www.power.org/ (search PowerISA)
00041 //   PDFCrbgIndexMSB=0\L
00042 
00043 using namespace std;
00044 using namespace boost;
00045 using namespace Onikiri;
00046 using namespace Onikiri::EmulatorUtility;
00047 using namespace Onikiri::PPC64Linux;
00048 
00049 // {PPC64DecoderprivateoC
00050 // |l[Xy[X
00051 namespace { 
00052     // eIyhDecodeInfoElemz`C
00053     // DecodeInfoElem ]Iyho
00054 
00055 
00056     // CR bitwCCRCRnbit
00057 
00058     // Iyh`CDecodedInsn
00059     const int NONE = 0;
00060     // Reg
00061     const int D_R0 =  8;
00062     const int D_R1 =  9;
00063     const int D_R2 = 10;
00064     const int D_R3 = 11;
00065     // Imm
00066     const int D_I0 = 16;
00067     const int D_I1 = 17;
00068     const int D_I2 = 18;
00069     const int D_I3 = 19;
00070     
00071     // Iyh
00072     enum OperandType {
00073         // Reg
00074         GPR,    // GPR number
00075         FPR,    // FPR number
00076         CRN,    // CR number
00077 //      SPR,    // SPR number
00078         // special form
00079         // (no special form)
00080 
00081         // Imm
00082         CRI,    // CR bit index
00083         UIM,    // unsigned imm
00084         SIM,    // signed imm
00085 
00086         // special form
00087         SH6,    // MD-Form/XS-Form 6-bit shift count
00088         MB5,    // MD-Form/MDS-Form 5-bit mask begin/end
00089     };
00090 
00091     struct OperandFormat {
00092         OperandType Type;   // Iyh
00093         int BitIndex;       // CodeWord u (LSB=0)
00094         int BitCount;       // rbg
00095     };
00096     struct DecodeInfoElem {
00097         int DecodedPlace;   // DecodedInsn u
00098         OperandFormat Operand;  // 
00099     };
00100 
00101     static const int MaxOperands = 6;
00102     struct DecodeInfo {
00103         struct DecodeInfoElem DecodeInfoElem[MaxOperands];
00104     };
00105 
00106     // Iyh`
00107     const OperandFormat GR0 = {GPR, 21, 5}; // GPR  6:10
00108     const OperandFormat GR1 = {GPR, 16, 5}; // GPR 11:15
00109     const OperandFormat GR2 = {GPR, 11, 5}; // GPR 16:20
00110 
00111     const OperandFormat FR0 = {FPR, 21, 5}; // FPR  6:10
00112     const OperandFormat FR1 = {FPR, 16, 5}; // FPR 11:15
00113     const OperandFormat FR2 = {FPR, 11, 5}; // FPR 16:20
00114     const OperandFormat FR3 = {FPR,  6, 5}; // FPR 21:25
00115 
00116     // Index
00117     const OperandFormat IX0 = {UIM, 21, 5}; // UIM  6:10
00118     const OperandFormat IX1 = {UIM, 16, 5}; // UIM 11:15
00119     const OperandFormat IX2 = {UIM, 11, 5}; // UIM 16:20
00120     const OperandFormat IX3 = {UIM,  6, 5}; // UIM 21:25
00121     const OperandFormat IX4 = {UIM,  1, 5}; // UIM 26:30
00122 
00123     const OperandFormat UI16 = {UIM,  0, 16};   // UIM 16:31
00124     const OperandFormat SI16 = {SIM,  0, 16};   // SIM 16:31
00125     const OperandFormat IDS = {SIM,  2, 14};    // SIM 16:29 : DS-Formdisplacement
00126 
00127     const OperandFormat IMB5 = {MB5,  0, 0};    // UIM 26:26 || UIM21:25
00128     const OperandFormat ISH6 = {SH6,  0, 0};    // UIM 30:30 || UIM16:20
00129 
00130     const OperandFormat IFLM = {UIM, 17, 8};    // UIM  7:14
00131 
00132     // CR Number
00133     const OperandFormat CR0 = {CRN, 23, 3}; // CRN  6: 8
00134     const OperandFormat CR1 = {CRN, 18, 3}; // CRN 11:13
00135     const OperandFormat CR2 = {CRN, 13, 3}; // CRN 16:18
00136     const OperandFormat CR3 = {CRN,  8, 3}; // CRN 21:23
00137 
00138     // CR Bit
00139     const OperandFormat CI0 = {UIM, 21, 2}; // UIM  9:10
00140     const OperandFormat CI1 = {UIM, 16, 2}; // UIM 14:15
00141     const OperandFormat CI2 = {UIM, 11, 2}; // UIM 19:20
00142     const OperandFormat CI3 = {UIM,  6, 2}; // UIM 24:25
00143 
00144     //
00145     // Form
00146     //
00147     const DecodeInfo UND = {};
00148     const DecodeInfo EXT = {};  // gIyR[h
00149 
00150     // I-Form
00151     const DecodeInfo IFRM = {{{D_I0, {SIM, 2, 24}}}};
00152 
00153     // B-Form
00154     const DecodeInfo BFRM = {{{D_R0, CR1}, {D_I0, CI1}, {D_I1, {SIM, 2, 14}}}};
00155 
00156     // A-Form : GR, GR, GR, CR (isel)
00157     const DecodeInfo AGGGC = {{{D_R0, GR0}, {D_R1, GR1}, {D_R2, GR2}, {D_R3, CR3}, {D_I0, CI3}}};
00158     // A-Form : FR, FR, FR, FR
00159     const DecodeInfo AFFFF = {{{D_R0, FR0}, {D_R1, FR1}, {D_R2, FR2}, {D_R3, FR3}}};
00160     // A-Form : FR, FR, FR, __
00161     const DecodeInfo AFFF_ = {{{D_R0, FR0}, {D_R1, FR1}, {D_R2, FR2}}};
00162     // A-Form : FR, FR, __, FR
00163     const DecodeInfo AFF_F = {{{D_R0, FR0}, {D_R1, FR1}, {D_R2, FR3}}};
00164     // A-Form : FR, __, FR, FR
00165     const DecodeInfo AF_F_ = {{{D_R0, FR0}, {D_R1, FR2}}};
00166 
00167     // SC-Form (takes no operand)
00168     const DecodeInfo SCFRM = {};
00169 
00170     // D-Form
00171     const DecodeInfo IDRU = {{{D_R0, GR0}, {D_R1, GR1}, {D_I0, UI16}}};
00172     const DecodeInfo IDRS = {{{D_R0, GR0}, {D_R1, GR1}, {D_I0, SI16}}};
00173     const DecodeInfo IDRD = IDRS;
00174     // D-Form : Compare
00175     const DecodeInfo IDCU = {{{D_R0, CR0}, {D_R1, GR1}, {D_I0, UI16}}};
00176     const DecodeInfo IDCS = {{{D_R0, CR0}, {D_R1, GR1}, {D_I0, SI16}}};
00177     const DecodeInfo IDCD = IDCS;
00178     // D-Form : IX0, R1, SI16 ( tdi, twi)
00179     const DecodeInfo IDXS = {{{D_R1, GR1}, {D_I0, IX0}, {D_I1, SI16}}};
00180     // D-Form : FP Load/Store
00181     const DecodeInfo FDRS = {{{D_R0, FR0}, {D_R1, GR1}, {D_I0, SI16}}};
00182     const DecodeInfo FDRD = FDRS;
00183 
00184     // DS-Form : Int Load/Store
00185     const DecodeInfo DSFRM = {{{D_R0, GR0}, {D_R1, GR1}, {D_I0, IDS}}};
00186 
00187     // XL-Form : conditional branch to LR/CTR (bclr, bcctr)
00188     const DecodeInfo XLBR = {{{D_R0, CR1}, {D_I0, CI1}}};
00189     // XL-Form : CR bit-wise operations
00190     const DecodeInfo XLCRB = {{{D_R0, CR0}, {D_I0, CI0}, {D_R1, CR1}, {D_I1, CI1}, {D_R2, CR2}, {D_I2, CI2}}};
00191     // XL-Form : CR move operations
00192     const DecodeInfo XLCR = {{{D_R0, CR0}, {D_R1, CR1}}};
00193     // XL-Form no operand
00194     const DecodeInfo XL__ = {};
00195 
00196     // X-Form : GR, __, __ ; mtspr, mfspr
00197     const DecodeInfo XG__ = {{{D_R0, GR0}}};
00198     // X-Form : GR, FXM ; mt(o)crf, mf(o)crf, mtcr, mfcr
00199     const DecodeInfo XGFXM = {{{D_R0, GR0}, {D_I1, {UIM, 12, 8}}}};
00200     // X-Form : GR, GR, __
00201     const DecodeInfo XGG_ = {{{D_R0, GR0}, {D_R1, GR1}}};
00202     // X-Form : GR, GR, GR
00203     const DecodeInfo XGGG = {{{D_R0, GR0}, {D_R1, GR1}, {D_R2, GR2}}};
00204     // X-Form : GR, GR, IX
00205     const DecodeInfo XGGI = {{{D_R0, GR0}, {D_R1, GR1}, {D_I0, IX2}}};
00206     // X-Form : GR, GR, SH
00207     const DecodeInfo XGGS = {{{D_R0, GR0}, {D_R1, GR1}, {D_I0, ISH6}}};
00208     // X-Form : CR, GR, GR ;compare
00209     const DecodeInfo XCMP = {{{D_R0, CR0}, {D_R1, GR1}, {D_R2, GR2}}};
00210     // X-Form : IX, GR, GR
00211     const DecodeInfo XIGG = {{{D_I0, IX0}, {D_R0, GR1}, {D_R1, GR2}}};
00212     // X-Form : __, GR, GR
00213     const DecodeInfo X_GG = {{{D_R0, GR1}, {D_R1, GR2}}};
00214     // X-Form : __, __, __
00215     const DecodeInfo X___ = {};
00216     // X-Form : CN, __, __
00217     const DecodeInfo XN__ = {{{D_R0, CR0}}};
00218     // X-Form : FR, GR, GR; FP load/store
00219     const DecodeInfo XFGG = {{{D_R0, FR0}, {D_R1, GR1}, {D_R2, GR2}}};
00220     // X-Form : FR, FR, FR
00221     const DecodeInfo XFFF = {{{D_R0, FR0}, {D_R1, FR1}, {D_R2, FR2}}};
00222     // X-Form : FR, __, FR
00223     const DecodeInfo XF_F = {{{D_R0, FR0}, {D_R1, FR2}}};
00224     // X-Form : FR, __, __
00225     const DecodeInfo XF__ = {{{D_R0, FR0}}};
00226     // X-Form : CR, FR, FR ; FP compare
00227     const DecodeInfo XFCMP = {{{D_R0, CR0}, {D_R1, FR1}, {D_R2, FR2}}};
00228     // X-Form : IX, __, __
00229     const DecodeInfo XI__ = {{{D_I0, IX0}}};
00230 
00231     // M-Form (shift count from register)
00232     const DecodeInfo MREG = {{{D_R0, GR0}, {D_R1, GR1}, {D_R2, GR2}, {D_I0, IX3}, {D_I1, IX4}}};
00233     // M-Form (shift count from immediate)
00234     const DecodeInfo MIMM = {{{D_R0, GR0}, {D_R1, GR1}, {D_I0, IX2}, {D_I1, IX3}, {D_I2, IX4}}};
00235 
00236     // MD-Form
00237     const DecodeInfo MDFRM = {{{D_R0, GR0}, {D_R1, GR1}, {D_I0, ISH6}, {D_I1, IMB5}}};
00238     // MDS-Form
00239     const DecodeInfo MDSFRM = {{{D_R0, GR0}, {D_R1, GR1}, {D_R2, GR2}, {D_I0, IMB5}}};
00240 
00241     // R[hIyh`
00242     const DecodeInfo OpCodeToDecodeInfo[64] =
00243     {
00244         // 0x00
00245         UND   , UND   , IDXS  , IDXS  , UND   , UND   , UND   , IDRS  ,
00246         // 0x08
00247         IDRS  , UND   , IDCU  , IDCS  , IDRS  , IDRS  , IDRS  , IDRS  ,
00248         // 0x10
00249         BFRM  , SCFRM , IFRM  , EXT   , MIMM  , MIMM  , UND   , MREG  ,
00250         // 0x18
00251         IDRU  , IDRU  , IDRU  , IDRU  , IDRU  , IDRU  , EXT   , EXT   ,
00252         // 0x20
00253         IDRD  , IDRD  , IDRD  , IDRD  , IDRD  , IDRD  , IDRD  , IDRD  ,
00254         // 0x28
00255         IDRD  , IDRD  , IDRD  , IDRD  , IDRD  , IDRD  , IDRD  , IDRD  ,
00256         // 0x30
00257         FDRD  , FDRD  , FDRD  , FDRD  , FDRD  , FDRD  , FDRD  , FDRD  ,
00258         // 0x38
00259         UND   , UND   , EXT   , EXT   , UND   , UND   , EXT   , EXT   ,
00260     };
00261     // lq (56), stq(62.2) T|[g (privileged)
00262 
00263     // Opcode DecodeInfog (zs)
00264     struct OpcodeDecodeInfoPair {
00265         u32 Opcode;
00266         struct DecodeInfo DecodeInfo;
00267     };
00268 
00269     const DecodeInfo OpCode30ExtToDecodeInfo[16] = {
00270         // 0x00
00271         MDFRM , MDFRM , MDFRM , MDFRM , MDFRM , MDFRM , MDFRM , MDFRM , 
00272         // 0x08
00273         MDSFRM, MDSFRM, UND   , UND   , UND   , UND   , UND   , UND   ,
00274     };
00275     const DecodeInfo OpCode58ExtToDecodeInfo[4] = {
00276         DSFRM , DSFRM , DSFRM , UND , 
00277     };
00278     const DecodeInfo OpCode62ExtToDecodeInfo[4] = {
00279         DSFRM , DSFRM , UND   , UND , 
00280     };
00281 
00282     const OpcodeDecodeInfoPair OpCode19ExtToDecodeInfo[] = {
00283         {   0, XLCR  }, // mcrf
00284         {  16, XLBR  }, // bclr
00285         {  33, XLCRB }, // crnor
00286         { 129, XLCRB }, // crandc
00287         { 150, XL__  }, // isync
00288         { 193, XLCRB }, // crxor
00289         { 225, XLCRB }, // crnand
00290         { 257, XLCRB }, // crand
00291         { 289, XLCRB }, // creqv
00292         { 417, XLCRB }, // crorc
00293         { 449, XLCRB }, // cror
00294         { 528, XLBR  }, // bcctr
00295     };
00296     const OpcodeDecodeInfoPair OpCode31ExtToDecodeInfo[] = {
00297         {   0, XCMP  }, // cmp (d/w)
00298         {   4, XIGG  }, // tw
00299         {   8, XGGG  }, // subfc
00300         {   9, XGGG  }, // mulhdu
00301         {  10, XGGG  }, // addc
00302         {  11, XGGG  }, // mulhwu
00303         {  19, XGFXM }, // mfcr
00304         {  20, XGGG  }, // lwarx
00305         {  21, XGGG  }, // ldx
00306         {  23, XGGG  }, // lwzx
00307         {  24, XGGG  }, // slw
00308         {  26, XGG_  }, // cntlzw
00309         {  27, XGGG  }, // sld
00310         {  28, XGGG  }, // and
00311 
00312         {  32, XCMP  }, // cmpl (d/w)
00313         {  40, XGGG  }, // subf
00314         {  53, XGGG  }, // ldux
00315         {  54, X_GG  }, // dcbst
00316         {  55, XGGG  }, // lwzux
00317         {  58, XGG_  }, // cntlzd
00318         {  60, XGGG  }, // andc
00319 
00320         {  68, XIGG  }, // td
00321         {  73, XGGG  }, // mulhd
00322         {  75, XGGG  }, // mulhw
00323         {  83, XG__  }, // mfmsr
00324         {  84, XGGG  }, // ldarx
00325         {  86, X_GG  }, // dcbf
00326         {  87, XGGG  }, // lbzx
00327 
00328         { 104, XGG_  }, // neg
00329         { 119, XGGG  }, // lbzux
00330         { 122, XGG_  }, // popcntb
00331         { 124, XGGG  }, // nor
00332 
00333         { 136, XGGG  }, // subfe
00334         { 138, XGGG  }, // adde
00335         { 144, XGFXM }, // mtcrf
00336         { 149, XGGG  }, // stdx
00337         { 150, XGGG  }, // stwcx.
00338         { 151, XGGG  }, // stwx
00339 
00340         { 181, XGGG  }, // stdux
00341         { 183, XGGG  }, // stwux
00342 
00343         { 200, XGG_  }, // subfze
00344         { 202, XGG_  }, // addze
00345         { 214, XGGG  }, // stdcx.
00346         { 215, XGGG  }, // stbx
00347 
00348         { 232, XGG_  }, // subfme
00349         { 233, XGGG  }, // mulld
00350         { 234, XGG_  }, // addme
00351         { 235, XGGG  }, // mullw
00352         { 246, X_GG  }, // dcbtst
00353         { 247, XGGG  }, // stbux
00354 
00355         { 266, XGGG  }, // add
00356         { 278, X_GG  }, // dcbt
00357         { 279, XGGG  }, // lhzx
00358         { 284, XGGG  }, // eqv
00359 
00360         { 311, XGGG  }, // lhzux
00361         { 316, XGGG  }, // xor
00362 
00363         { 339, XG__  }, // mfspr
00364         { 341, XGGG  }, // lwax
00365         { 343, XGGG  }, // lhax
00366 
00367         { 371, XG__  }, // mftb
00368         { 373, XGGG  }, // lwaux
00369         { 375, XGGG  }, // lhaux
00370 
00371         { 407, XGGG  }, // sthx
00372         { 412, XGGG  }, // orc
00373 
00374         { 439, XGGG  }, // sthux
00375         { 444, XGGG  }, // or
00376 
00377         { 457, XGGG  }, // divdu
00378         { 459, XGGG  }, // divwu
00379         { 467, XG__  }, // mtspr
00380         { 476, XGGG  }, // nand
00381 
00382         { 489, XGGG  }, // divd
00383         { 491, XGGG  }, // divw
00384 
00385         { 512, XN__  }, // mcrxr
00386         { 520, XGGG  }, // subfco
00387         { 521, XGGG  }, // mulhdu
00388         { 522, XGGG  }, // addco
00389         { 523, XGGG  }, // mulhwu
00390         { 533, XGGG  }, // lswx
00391         { 534, XGGG  }, // lwbrx
00392         { 535, XFGG  }, // lfsx
00393         { 536, XGGG  }, // srw
00394         { 539, XGGG  }, // srd
00395 
00396         { 552, XGGG  }, // subfo
00397         { 567, XFGG  }, // lfsux
00398 
00399         { 585, XGGG  }, // mulhd
00400         { 587, XGGG  }, // mulhw
00401         { 597, XGGI  }, // lswi
00402         { 598, X___  }, // sync
00403         { 599, XFGG  }, // lfdx
00404 
00405         { 616, XGG_  }, // nego
00406         { 631, XFGG  }, // lfdux
00407 
00408         { 648, XGGG  }, // subfeo
00409         { 650, XGGG  }, // addeo
00410         { 661, XGGG  }, // stswx
00411         { 662, XGGG  }, // stwbrx
00412         { 663, XFGG  }, // stfsx
00413 
00414         { 695, XFGG  }, // stfsux
00415 
00416         { 712, XGG_  }, // subfzeo
00417         { 714, XGG_  }, // addzeo
00418         { 725, XGGI  }, // stswi
00419         { 727, XFGG  }, // stfdx
00420 
00421         { 744, XGG_  }, // subfmeo
00422         { 745, XGGG  }, // mulldo
00423         { 746, XGG_  }, // addmeo
00424         { 747, XGGG  }, // mullwo
00425         { 759, XFGG  }, // stdux
00426 
00427         { 778, XGGG  }, // addo
00428         { 790, XGGG  }, // lhbrx
00429         { 792, XGGG  }, // sraw
00430         { 794, XGGG  }, // srad
00431 
00432         { 824, XGGI  }, // srawi
00433         { 826, XGGS  }, // sradi
00434         { 827, XGGS  }, // sradi
00435 
00436         { 854, X___  }, // eieio
00437 
00438         { 918, XGGG  }, // sthbrx
00439         { 922, XGG_  }, // extsh
00440 
00441         { 954, XGG_  }, // extsb
00442 
00443         { 969, XGGG  }, // divduo
00444         { 971, XGGG  }, // divwuo
00445         { 982, X_GG  }, // icbi
00446         { 983, XFGG  }, // stfiwx
00447         { 986, XGG_  }, // extsw
00448 
00449         {1001, XGGG  }, // divdo
00450         {1003, XGGG  }, // divwo
00451         {1014, X_GG  }, // dcbz
00452 //      {   0, X     }, //
00453     };
00454     const OpcodeDecodeInfoPair OpCode59ExtToDecodeInfo[] = {
00455         {0, UND},   // 
00456     };
00457     const OpcodeDecodeInfoPair OpCode63ExtToDecodeInfo[] = {
00458         {   0, XFCMP }, // fcmpu
00459         {  12, XF_F  }, // frsp
00460         {  14, XF_F  }, // fctiw
00461         {  15, XF_F  }, // fctiwz
00462 
00463         {  32, XFCMP }, // fcmpo
00464         {  38, XI__  }, // mtfsb1
00465         {  40, XF_F  }, // fneg
00466 
00467         {  64, {{{D_R0, CR0},{D_I0, {UIM, 18, 3}}}} },  // mcrfs
00468         {  70, XI__  }, // mtfsb0
00469         {  72, XF_F  }, // fmr
00470 
00471         { 134, {{{D_I0, {UIM, 23, 3}}, {D_I1, {UIM, 12, 4}}}} },    // mtfsfi
00472         { 136, XF_F  }, // fnabs
00473 
00474         { 264, XF_F  }, // fabs
00475 
00476         { 392, XF_F  }, // frin
00477         { 424, XF_F  }, // friz
00478         { 456, XF_F  }, // frip
00479         { 488, XF_F  }, // frim
00480 
00481         { 583, XF__  }, // mffs
00482         { 711, {{{D_I0, IFLM}, {D_R0, FR2}}}},  // mtfsf
00483 
00484         { 814, XF_F  }, // fctid
00485         { 815, XF_F  }, // fctidz
00486         { 846, XF_F  }, // fcfid
00487     };
00488 
00489     // Opcode59 Cbit 21:25 FRCgdon't care (bit261)
00490     const DecodeInfo OpCode59FRCExtToDecodeInfo[16] = {
00491         // 0x00
00492         UND   , UND   , AFFF_ , UND   , AFFF_ , AFFF_ , AF_F_ , UND   ,
00493         // 0x08
00494         AF_F_ , AFF_F , AF_F_ , UND   , AFFFF , AFFFF , AFFFF , AFFFF ,
00495     };
00496     // Opcode63 Cbit 21:25 FRCgdon't care (bit261)
00497     const DecodeInfo OpCode63FRCExtToDecodeInfo[16] = {
00498         // 0x00
00499         UND   , UND   , AFFF_ , UND   , AFFF_ , AFFF_ , AF_F_ , AFFFF  ,
00500         // 0x08
00501         AF_F_ , AFF_F , AF_F_ , UND   , AFFFF , AFFFF , AFFFF , AFFFF ,
00502     };
00503 
00504     // OpCodeXXExtToDecodeInfo beginend`
00505 #define MakeBeginAndEnd(n) \
00506     const OpcodeDecodeInfoPair* const OpCode##n##ExtToDecodeInfoBegin = OpCode##n##ExtToDecodeInfo; \
00507     const OpcodeDecodeInfoPair* const OpCode##n##ExtToDecodeInfoEnd = OpCode##n##ExtToDecodeInfoBegin + sizeof(OpCode##n##ExtToDecodeInfo)/sizeof(OpCode##n##ExtToDecodeInfo[0]);
00508 
00509     MakeBeginAndEnd(19);
00510     MakeBeginAndEnd(31);
00511     MakeBeginAndEnd(59);
00512     MakeBeginAndEnd(63);
00513 #undef MakeBeginAndEnd
00514 
00515     struct OpcodeDecodeInfoPairLess : public binary_function< OpcodeDecodeInfoPair, OpcodeDecodeInfoPair, bool >
00516     {
00517         bool operator()(const OpcodeDecodeInfoPair& lhs, const OpcodeDecodeInfoPair& rhs)
00518         {
00519             return lhs.Opcode < rhs.Opcode;
00520         }
00521     };
00522 
00523     const DecodeInfo& FindDecodeInfo(const OpcodeDecodeInfoPair* first, const OpcodeDecodeInfoPair* last, u32 xo)
00524     {
00525         OpcodeDecodeInfoPair val;
00526         val.Opcode = xo;
00527 
00528         const OpcodeDecodeInfoPair* e = lower_bound(first, last, val, OpcodeDecodeInfoPairLess());
00529 
00530         if (e == last)
00531             return UND;
00532         else
00533             return e->DecodeInfo;
00534     }
00535 
00536     const DecodeInfo& GetDecodeInfo(u32 codeWord)
00537     {
00538         u32 opcode = (codeWord >> 26) & 0x3f;
00539 
00540         // gIyR[h
00541         switch (opcode) {
00542         case 30:
00543             {
00544                 u32 xo = (codeWord >> 1) & 0x0f;
00545                 return OpCode30ExtToDecodeInfo[xo];
00546             }
00547         case 58:
00548             {
00549                 u32 xo = codeWord & 0x03;
00550                 return OpCode58ExtToDecodeInfo[xo];
00551             }
00552         case 62:
00553             {
00554                 u32 xo = codeWord & 0x03;
00555                 return OpCode62ExtToDecodeInfo[xo];
00556             }
00557         case 19:
00558             {
00559                 u32 xo = (codeWord >> 1) & 0x3ff;
00560                 return FindDecodeInfo(OpCode19ExtToDecodeInfoBegin, OpCode19ExtToDecodeInfoEnd, xo);
00561             }
00562         case 31:
00563             {
00564                 u32 xo = (codeWord >> 1) & 0x3ff;
00565                 if ((xo & 0x00f) == 0x00f)
00566                     return AGGGC;   // isel
00567                 else
00568                     return FindDecodeInfo(OpCode31ExtToDecodeInfoBegin, OpCode31ExtToDecodeInfoEnd, xo);
00569             }
00570         case 59:
00571             {
00572                 u32 xo = (codeWord >> 1) & 0x3ff;
00573                 if (xo & 0x010)
00574                     return OpCode59FRCExtToDecodeInfo[xo & 0x00f];
00575                 else
00576                     return FindDecodeInfo(OpCode59ExtToDecodeInfoBegin, OpCode59ExtToDecodeInfoEnd, xo);
00577             }
00578         case 63:
00579             {
00580                 u32 xo = (codeWord >> 1) & 0x3ff;
00581                 if (xo & 0x010)
00582                     return OpCode63FRCExtToDecodeInfo[xo & 0x00f];
00583                 else
00584                     return FindDecodeInfo(OpCode63ExtToDecodeInfoBegin, OpCode63ExtToDecodeInfoEnd, xo);
00585             }
00586         default:
00587             return OpCodeToDecodeInfo[opcode];
00588         }
00589     }
00590 }
00591 
00592 PPC64Decoder::DecodedInsn::DecodedInsn()
00593 {
00594     clear();
00595 }
00596 
00597 void PPC64Decoder::DecodedInsn::clear()
00598 {
00599     CodeWord = 0;
00600 
00601     std::fill(Imm.begin(), Imm.end(), 0);
00602     std::fill(Reg.begin(), Reg.end(), -1);
00603 }
00604 
00605 
00606 PPC64Decoder::PPC64Decoder()
00607 {
00608 }
00609 
00610 void PPC64Decoder::Decode(u32 codeWord, DecodedInsn* out)
00611 {
00612     out->clear();
00613 
00614     out->CodeWord = codeWord;
00615 
00616     const DecodeInfo& decodeInfo = GetDecodeInfo(codeWord);
00617 
00618     for (int i = 0; i < MaxOperands; i ++) {
00619         const OperandFormat& operand = decodeInfo.DecodeInfoElem[i].Operand;
00620         const int decodedPlace = decodeInfo.DecodeInfoElem[i].DecodedPlace;
00621 
00622         if (decodedPlace == NONE) {
00623             break;
00624         }
00625 
00626         u64 value = 0;
00627 
00628         // OperandFormat ]codeWordo
00629         switch (operand.Type) {
00630         case GPR:
00631             value = ExtractBits<u64>(codeWord, operand.BitIndex, operand.BitCount) + GP_REG0;
00632             break;
00633         case FPR:
00634             value = ExtractBits<u64>(codeWord, operand.BitIndex, operand.BitCount) + FP_REG0;
00635             break;
00636         case CRN:
00637             value = ExtractBits<u64>(codeWord, operand.BitIndex, operand.BitCount) + COND_REG0;
00638             break;
00639         //case SPR:
00640         //  break;
00641         case CRI:
00642         case UIM:
00643             value = ExtractBits<u64>(codeWord, operand.BitIndex, operand.BitCount);
00644             break;
00645         case SIM:
00646             value = ExtractBits<u64>(codeWord, operand.BitIndex, operand.BitCount, true);
00647             break;
00648         case SH6:
00649             value = (ExtractBits<u64>(codeWord, 1, 1) << 5) | ExtractBits(codeWord, 11, 5);
00650             break;
00651         case MB5:
00652             value = (ExtractBits<u64>(codeWord, 5, 1) << 5) | ExtractBits(codeWord, 6, 5);
00653             break;
00654         }
00655 
00656         if (D_R0 <= decodedPlace && decodedPlace <= D_R3) {
00657             // Reg
00658             out->Reg[decodedPlace-D_R0] = static_cast<int>(value);
00659         }
00660         else if (D_I0 <= decodedPlace && decodedPlace <= D_I3) {
00661             // Imm
00662             out->Imm[decodedPlace-D_I0] = value;
00663         }
00664     }
00665 }
00666 

Onikiri2に対してTue Jun 18 14:34:19 2013に生成されました。  doxygen 1.4.7