src/Sim/Pipeline/Fetcher/Fetcher.h

説明を見る。
00001 // 
00002 // Copyright (c) 2005-2008 Kenichi Watanabe.
00003 // Copyright (c) 2005-2008 Yasuhiro Watari.
00004 // Copyright (c) 2005-2008 Hironori Ichibayashi.
00005 // Copyright (c) 2008-2009 Kazuo Horio.
00006 // Copyright (c) 2009-2013 Naruki Kurata.
00007 // Copyright (c) 2005-2013 Ryota Shioya.
00008 // Copyright (c) 2005-2013 Masahiro Goshima.
00009 // 
00010 // This software is provided 'as-is', without any express or implied
00011 // warranty. In no event will the authors be held liable for any damages
00012 // arising from the use of this software.
00013 // 
00014 // Permission is granted to anyone to use this software for any purpose,
00015 // including commercial applications, and to alter it and redistribute it
00016 // freely, subject to the following restrictions:
00017 // 
00018 // 1. The origin of this software must not be misrepresented; you must not
00019 // claim that you wrote the original software. If you use this software
00020 // in a product, an acknowledgment in the product documentation would be
00021 // appreciated but is not required.
00022 // 
00023 // 2. Altered source versions must be plainly marked as such, and must not be
00024 // misrepresented as being the original software.
00025 // 
00026 // 3. This notice may not be removed or altered from any source
00027 // distribution.
00028 // 
00029 // 
00030 
00031 
00032 #ifndef SIM_PIPELINE_FETCHER_FETCHER_H
00033 #define SIM_PIPELINE_FETCHER_FETCHER_H
00034 
00035 #include "Types.h"
00036 #include "Utility/Collection/fixed_size_buffer.h"
00037 
00038 #include "Interface/Addr.h"
00039 #include "Interface/OpInfo.h"
00040 #include "Env/Param/ParamExchange.h"
00041 
00042 #include "Sim/ISAInfo.h"
00043 #include "Sim/Foundation/Checkpoint/CheckpointMaster.h"
00044 #include "Sim/Pipeline/PipelineNodeBase.h"
00045 #include "Sim/Foundation/Hook/HookDecl.h"
00046 
00047 namespace Onikiri
00048 {
00049     class BPred;
00050     class Cache;
00051     class Thread;
00052     class EmulatorIF;
00053     class GlobalClock;
00054     class Scheduler;
00055     class RegDepPredIF;
00056     class MemDepPredIF;
00057     class MemOrderManager;
00058     class Cache;
00059     class CacheSystem;
00060     class ForwardEmulator;
00061     class FetchThreadSteererIF;
00062 
00063     //
00064     // A class that fetches ops.
00065     //
00066     class Fetcher : 
00067         public PipelineNodeBase
00068     {
00069 
00070     public:
00071 
00072         // A hook parameter for s_fetchHook.
00073         // Cannot use an usual calling scheme for hook, 
00074         // because 'op' may be not created yet at Fetch().
00075         struct FetchHookParam
00076         {
00077             OpIterator op;  
00078         };
00079 
00080         // A hook parameter for s_fetchSteeringHook.
00081         struct SteeringHookParam
00082         {   
00083             // out
00084             Thread* targetThread;                       // A selected thread.
00085 
00086             // in
00087             PhysicalResourceArray<Thread>* threadList;  // Candidate threads for steering.
00088             bool    update;                             // Update internal context or not.
00089         };
00090 
00091         struct FetchDecisionHookParam
00092         {   
00093             Thread* thread;
00094             PC pc;
00095             OpInfo** infoArray;
00096             int numOp;
00097             bool canFetch;
00098         };
00099 
00100         struct BranchPredictionHookParam
00101         {
00102             PC fetchGroupPC;
00103             OpIterator op;
00104         };
00105 
00106         // parameter mapping
00107         BEGIN_PARAM_MAP("")
00108             BEGIN_PARAM_PATH( GetParamPath() )
00109                 PARAM_ENTRY( "@FetchWidth",     m_fetchWidth );
00110                 PARAM_ENTRY( "@FetchLatency" ,  m_fetchLatency );
00111                 PARAM_ENTRY( "@IdealMode",      m_idealMode );
00112                 PARAM_ENTRY( "@CheckLatencyMismatch",   m_checkLatencyMismatch );
00113             END_PARAM_PATH()
00114             BEGIN_PARAM_PATH( GetResultPath() )
00115                 RESULT_ENTRY( "@NumFetchedOps", m_numFetchedOp )
00116                 BEGIN_PARAM_PATH( "NumStalledCycles/" )
00117                     RESULT_ENTRY( "@Total",             m_stallCycles.total )
00118                     RESULT_ENTRY( "@CurrentSyscall",    m_stallCycles.currentSyscall )
00119                     RESULT_ENTRY( "@NextSyscall",       m_stallCycles.nextSyscall )
00120                     RESULT_ENTRY( "@CheckpointFull",    m_stallCycles.checkpoint )
00121                     RESULT_ENTRY( "@InorderListFull",   m_stallCycles.inorderList )
00122                     RESULT_ENTRY( "@Others",            m_stallCycles.others )
00123                 END_PARAM_PATH()
00124                 RESULT_ENTRY( "@NumFetchedPCs",     m_numFetchedPC )
00125                 RESULT_ENTRY( "@NumFetchGroups",    m_numFetchGroup )
00126                 RESULT_RATE_ENTRY( 
00127                     "@AverageFetchGroupSize",
00128                     m_numFetchedPC, m_numFetchGroup
00129                 )
00130             END_PARAM_PATH()
00131         END_PARAM_MAP()
00132 
00133         BEGIN_RESOURCE_MAP()
00134             RESOURCE_ENTRY( EmulatorIF, "emulator", m_emulator )
00135             RESOURCE_ENTRY( Thread, "thread",   m_thread )
00136             RESOURCE_ENTRY( Core,   "core",     m_core )
00137             RESOURCE_ENTRY( BPred,  "bPred",    m_bpred )
00138             RESOURCE_ENTRY( CacheSystem,    "cacheSystem",  m_cacheSystem )
00139             RESOURCE_ENTRY( GlobalClock,"globalClock",  m_globalClock )
00140             RESOURCE_ENTRY( ForwardEmulator,"forwardEmulator",  m_forwardEmulator )
00141             RESOURCE_ENTRY( FetchThreadSteererIF, "fetchThreadSteerer", m_fetchThreadSteerer)
00142         END_RESOURCE_MAP()
00143 
00144         Fetcher();
00145         virtual ~Fetcher();
00146 
00147         // Initialization/Finalization
00148         virtual void Initialize(InitPhase phase);
00149         virtual void Finalize();
00150 
00151         // PipelineNodeIF
00152         virtual void Evaluate();
00153         virtual void Update();
00154         virtual void Commit(OpIterator op);
00155 
00156         // タsI
00157         void Finished(OpIterator op);
00158 
00159         // accessors
00160         const int GetFetchWidth()   const { return m_fetchWidth;}
00161         BPred*      GetBPred()      const { return m_bpred;     }
00162         EmulatorIF* GetEmulator()   const { return m_emulator;  }
00163 
00164         void SetInitialNumFetchedOp(u64 num);
00165 
00166         //
00167         // --- Hook
00168         //
00169         // Prototype : void Method( HookParameter<Fetcher, FetchHookParam>* param )
00170         static HookPoint<Fetcher, FetchHookParam> s_fetchHook;
00171         
00172         // The hook point of 'GetFetchThread()'
00173         // Prototype : void Method( HookParameter<Fetcher, SteeringHookParam>* param )
00174         static HookPoint<Fetcher, SteeringHookParam> s_fetchSteeringHook;
00175 
00176         // The hook point of 'CanFetch()'
00177         // Prototype : void Method( HookParameter<Fetcher,FetchDecisionHookParam>* param )
00178         static HookPoint<Fetcher, FetchDecisionHookParam> s_fetchDecisionHook;
00179 
00180         // The hook point of 'PredictNextPC()'
00181         // Prototype : void Method( HookParameter<Fetcher,BranchPredictionParam>* param )
00182         static HookPoint<Fetcher, BranchPredictionHookParam> s_branchPredictionHook;
00183 
00184     protected:
00185         typedef PipelineNodeBase BaseType;
00186 
00187         // tFb`Opi[z
00188         typedef 
00189             fixed_sized_buffer< OpIterator, SimISAInfo::MAX_OP_INFO_COUNT_PER_PC, Fetcher >
00190             FetchedOpArray;
00191 
00192         int m_fetchWidth;       // fetch
00193         int m_fetchLatency;     // fetchCeV
00194 
00195         // tFb`Op
00196         u64 m_numFetchedOp;
00197         // tFb`PC
00198         u64 m_numFetchedPC;
00199         // tFb`tFb`O[v (1tFb`)
00200         u64 m_numFetchGroup;
00201         // tFb`O[v
00202         int m_numBranchInFetchGroup;
00203         // tFb`O[v (1)
00204         static const int m_maxBranchInFetchGroup = 1;
00205         // @tFb`s (1tFb`fetchWidth{)
00206         bool m_idealMode;
00207         // Check whether the number of fetch stages and the latency of a L1 cache match or not.
00208         bool m_checkLatencyMismatch;
00209         // tFb`sXbhCfbNX
00210         int m_currentFetchThread;
00211 
00212         // Updated content decided by Evaluate() in this cycle.
00213         struct Evaluated
00214         {
00215             // Whether InorderList is empty or not at this cycle.
00216             bool isInorderListEmpty;
00217 
00218             // Whether serializing is required or not
00219             bool reqSerializing;
00220 
00221             // Fetch PC
00222             PC fetchPC;
00223 
00224             // Fetch thread
00225             Thread* fetchThread;
00226             
00227             Evaluated() :
00228                 isInorderListEmpty( false ),
00229                 reqSerializing( false ),
00230                 fetchThread( NULL )
00231             {
00232             }
00233         } m_evaluated;
00234 
00235         // \
00236         BPred* m_bpred;                 
00237 
00238         // CacheSystem
00239         CacheSystem* m_cacheSystem;
00240 
00241         // G~[^
00242         EmulatorIF* m_emulator;
00243 
00244         // O[oNbN
00245         GlobalClock* m_globalClock;
00246 
00247         // Forward Emulator.
00248         ForwardEmulator* m_forwardEmulator;
00249 
00250         // FetchThreadSteerer
00251         FetchThreadSteererIF* m_fetchThreadSteerer;
00252 
00253         // vpJE^
00254         struct StallCycles
00255         {
00256             s64 currentSyscall; // VXeR[Xg[
00257             s64 nextSyscall;    // tFb`VXeR[Xg[
00258             s64 checkpoint;     // `FbN|CgXg[
00259             s64 inorderList;    // Stalled by the shortage of the entries of InorderList.
00260             s64 total;          // Total stalled cycles.
00261             s64 others;         
00262             StallCycles():
00263                 currentSyscall(0), nextSyscall(0), checkpoint(0), inorderList(0), total(0), others(0)
00264             {
00265             }
00266         } m_stallCycles;
00267 
00268         // ^CA
00269         bool IsSerializingRequired( const OpInfo* const info ) const;
00270         bool IsSerializingRequired( OpIterator op ) const;
00271         bool IsSerializingRequired( Thread* thread ) const;
00272 
00273         void CreateCheckpoint(OpIterator op);
00274         void BackupOnCheckpoint( OpIterator op, bool before );
00275 
00276         // infoArraynumOp Op  fetch  fetchedOp i[
00277         void Fetch( Thread* thread, FetchedOpArray& fetchedOp, PC pc, OpInfo** infoArray, int numOp );  
00278 
00279         // \s
00280         void PredictNextPC(OpIterator op, PC fetchGroupPC);
00281         void PredictNextPCBody( BranchPredictionHookParam* param );
00282 
00283         // iCacheANZXCeV
00284         const int GetICacheReadLatency(const PC& pc);
00285 
00286         // Enter an op to the fetcher pipeline.
00287         // An op is send to the renamer automatically when the op exits the fetch pipeline.
00288         void EnterPipeline( OpIterator op, int nextEventCycle );
00289 
00290         // arrayopCo|C^os
00291         void ForEachOp(FetchedOpArray& c, int size, void (Fetcher::*func)(OpIterator));
00292 
00293         // 
00294         template <typename T1>
00295         void ForEachOpArg1(FetchedOpArray& c, int size, T1 arg1, void (Fetcher::*func)(OpIterator, T1));
00296 
00297         // infoArray tFb`
00298         void CanFetchBody( FetchDecisionHookParam* param );
00299         bool CanFetch( Thread* thread, PC pc, OpInfo** infoArray, int numOp );
00300 
00301         // Decide a thread that fetches ops in this cycle.
00302         Thread* GetFetchThread( bool Update );
00303 
00304     };
00305 
00306 }; // namespace Onikiri
00307 
00308 #endif // SIM_PIPELINE_FETCHER_FETCHER_H
00309 

Onikiri2に対してTue Jun 18 14:34:24 2013に生成されました。  doxygen 1.4.7