00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030
00031
00032 #ifndef SIM_MEMORY_MEM_ORDER_MANAGER_H
00033 #define SIM_MEMORY_MEM_ORDER_MANAGER_H
00034
00035 #include "Sim/Foundation/Resource/ResourceNode.h"
00036 #include "Env/Param/ParamExchange.h"
00037 #include "Sim/Foundation/Hook/Hook.h"
00038
00039 #include "Sim/Op/OpContainer/OpList.h"
00040 #include "Sim/Op/OpContainer/OpExtraStateTable.h"
00041
00042 #include "Sim/Core/DataPredTypes.h"
00043 #include "Sim/Memory/MemOrderManager/MemOrderOperations.h"
00044
00045 namespace Onikiri
00046 {
00047 class Core;
00048 class Cache;
00049 class CacheSystem;
00050
00051 class MemOrderManager :
00052 public PhysicalResourceNode
00053 {
00054
00055 public:
00056 BEGIN_PARAM_MAP("")
00057
00058 BEGIN_PARAM_PATH( GetParamPath() )
00059
00060 PARAM_ENTRY( "@Unified", m_unified )
00061 PARAM_ENTRY( "@UnifiedCapacity", m_unifiedCapacity )
00062 PARAM_ENTRY( "@LoadCapacity", m_loadCapacity )
00063 PARAM_ENTRY( "@StoreCapacity", m_storeCapacity )
00064 PARAM_ENTRY( "@IdealPatialLoad", m_idealPartialLoad )
00065 PARAM_ENTRY( "@RemoveOpsOnCommit", m_removeOpsOnCommit )
00066
00067 END_PARAM_PATH()
00068
00069 BEGIN_PARAM_PATH( GetResultPath() )
00070
00071 BEGIN_PARAM_PATH( "ExecutedLoadAccess" )
00072 PARAM_ENTRY( "@NumStoreForwarding", m_numExecutedStoreForwarding )
00073 PARAM_ENTRY( "@NumLoadAccess", m_numExecutedLoadAccess )
00074 END_PARAM_PATH()
00075
00076 BEGIN_PARAM_PATH( "RetiredLoadAccess" )
00077 PARAM_ENTRY( "@NumStoreForwarding", m_numRetiredStoreForwarding )
00078 PARAM_ENTRY( "@NumLoadAccess", m_numRetiredLoadAccess )
00079 END_PARAM_PATH()
00080 END_PARAM_PATH()
00081
00082 END_PARAM_MAP()
00083
00084 BEGIN_RESOURCE_MAP()
00085 RESOURCE_ENTRY( EmulatorIF, "emulator", m_emulator )
00086 RESOURCE_ENTRY( Core, "core", m_core )
00087 RESOURCE_ENTRY( CacheSystem, "cacheSystem", m_cacheSystem )
00088 END_RESOURCE_MAP()
00089
00090 MemOrderManager();
00091 virtual ~MemOrderManager();
00092
00093 virtual void Initialize( InitPhase phase );
00094 virtual void Finalize();
00095
00096
00097 bool CanAllocate( OpIterator* infoArray, int numOp );
00098
00099
00100 void Allocate( OpIterator op );
00101
00102
00103 void Finished( OpIterator op );
00104
00105
00106 OpIterator GetProducerStore( OpIterator op, const MemAccess& access ) const;
00107
00108
00109
00110
00111
00112 OpIterator GetConsumerLoad( OpIterator producer, const MemAccess& access , int index );
00113
00114 void Commit( OpIterator op );
00115 void Retire( OpIterator op );
00116 void Flush( OpIterator op );
00117
00118
00119
00120 void Read( OpIterator op, MemAccess* access );
00121 void Write( OpIterator op, MemAccess* access );
00122
00123
00124 MemIF* GetMemImage() const { return m_emulator->GetMemImage(); }
00125 Core* GetCore() const { return m_core; }
00126 bool IsIdealPatialLoadEnabled() const { return m_idealPartialLoad; }
00127
00128
00129 struct MemImageAccessParam
00130 {
00131 MemIF* memImage;
00132 MemAccess* memAccess;
00133 };
00134 typedef HookPoint<MemOrderManager, MemImageAccessParam> MemImageAccessHook;
00135 static MemImageAccessHook s_writeMemImageHook;
00136 static MemImageAccessHook s_readMemImageHook;
00137
00138 protected:
00139
00140 typedef DataPredMissRecovery Recovery;
00141
00142 bool m_unified;
00143 int m_unifiedCapacity;
00144 int m_loadCapacity;
00145 int m_storeCapacity;
00146 bool m_idealPartialLoad;
00147 bool m_removeOpsOnCommit;
00148
00149
00150 int m_cacheLatency;
00151
00152
00153 s64 m_numExecutedStoreForwarding;
00154 s64 m_numRetiredStoreForwarding;
00155
00156 s64 m_numExecutedLoadAccess;
00157 s64 m_numRetiredLoadAccess;
00158
00159
00160 Cache* m_cache;
00161 CacheSystem* m_cacheSystem;
00162
00163
00164 OpList m_loadList;
00165 OpList m_storeList;
00166
00167 Core* m_core;
00168 EmulatorIF* m_emulator;
00169
00170
00171 MemOrderOperations m_memOperations;
00172
00173
00174 void ReadMemImage( OpIterator op, MemAccess* access );
00175 void WriteMemImage( OpIterator op, MemAccess* access );
00176
00177
00178
00179
00180 void DetectAccessOrderViolation( OpIterator store );
00181
00182
00183
00184 bool DetectPartialLoadViolation( OpIterator op );
00185
00186 void Delete( OpIterator op );
00187
00188 };
00189 };
00190
00191 #endif // SIM_MEMORY_MEM_ORDER_MANAGER_H
00192