Publications Academic Year 2011 (Sakai & Goshima Lab.)

Domestic Symposiums (with peer review)

• Symp. on Advanced Computing Systems & Infrastructures (SACSIS 2011) at Akihabara, Japan
  1. Naruki Kurata, Ryota Shioya, Masahiro Goshima, and Shuichi Sakai:
     Improvement and Evaluation of Switch-on-Future-Event Multithreading,
     Symp. on Advanced Computing Systems & Infrastructures (SACSIS), Vol. 2011, pp. 82—91 (2011).   (in Japanese).
     [ PDF ]
  2. Hiroshi Toi, Ryota Shioya, Masahiro Goshima, and Shuichi Sakai:
     Yet Another Taint Mode for PHP,
     Symp. on Advanced Computing Systems & Infrastructures (SACSIS), Vol. 2011, pp. 160—169 (2011).   (in Japanese).
     [ PDF ]
  3. Yuji Ito, Ryota Shioya, Masahiro Goshima, and Shuichi Sakai:
     Transactional Memory Selecting the Optimal Rollback Point,
     Symp. on Advanced Computing Systems & Infrastructures (SACSIS), Vol. 2011, pp. 324—331 (2011).   (in Japanese).
     [ PDF ]
  4. Yuichi Akamatsu, Masahiro Goshima, and Shuichi Sakai:
     A phse detection technique not using fixed length intervals,
     Symp. on Advanced Computing Systems & Infrastructures (SACSIS), Vol. 2011, pp. 271—278 (2011).   (in Japanese).
     [ PDF ]

Oral Presentations

• IEICE CPSY — SIG: Coumputer System
  1. Satoshi Arima, Takashi Okada, Ryota Shioya, Masahiro Goshima, and Shuichi Sakai:
     Transient-Fault-Tolerant Out-of-Order Superscalar Processor,
     IEICE Technical Reports CPSY 2011-5, pp. 23—28 (2011).   (in Japanese).
     [ PDF ]
• Summer Workshop on Parallel Processing (SWoPP) 2011
  1. Shuji Yoshida, Satoshi Arima, Naruki Kurata, Ryota Shioya, Masahiro Goshima, and Shuichi Sakai:
     Preliminary Experiment of A Clocking Scheme Enabling Dynamic Time Borrowing,
     IEICE Technical Reports CPSY2011–11, pp. 13—18 (2011).   (in Japanese).
     [ PDF ]
  2. Kaoru Hayakawa, Ryota Shioya, Masahiro Goshima, and Shuichi Sakai:
     Partial Platform Attestation,
     IEICE Technical ReportsVol. 111, No. 163 pp. 19—24, (2011). (in Japanese).
     [ PDF ]
  3. Mitsuo Date, Naruki Kurata, Ryota Shioya, Masahiro Goshima, and Shuichi Sakai:
     Trace Cache Architecture which Eliminates Register Renaming and Dispatch Network,
     IPSJ SIG Technical Report 2011–ARC–196, (2011). (in Japanese).
     [ PDF ]
• IPSJ The 74rd National Convention
  1. Kousuke Asami, Naruki Kurata, Ryota Shioya, Shinobu Miwa, Masahiro Goshima and Shuichi Sakai:
     A Study on Efficient Cache Utilization ,
     The 74rd National Convention of IPSJ, pp. 1-61—1-62 (2012). (in Japanese).
     [ PDF ]
  2. Tsuyoshi Yamada, Kaoru Hayakawa, Hiroshi Toi, Masahiro Goshima and Shuichi Sakai:
     Processors for Preventing Information Leakage,
     The 74rd National Convention of IPSJ, pp. 1-65—1-66 (2012). (in Japanese).
     [ PDF ]
  3. Souichirou Hirohata, Shuji Yoshida, Masahiro Goshima and Shuichi Sakai:
     Applying a Clocking Scheme Enabling Dynamic Time
     Borrowing to a Carry Look-ahead Adder,
     The 74rd National Convention of IPSJ, pp. 1-63—1-64 (2012). (in Japanese).
     [ PDF ]

Invited Talks

• IEEE IEEE Computer Society Japan Chapter
  1. Ryota Shioya:
     Register Cache System not for Latency Reduction Purpose,
     IEEE Computer Society Japan Chapter Young Author Award 2011(2011).

Award

• 73rd National Convention of IPSJ, Certificate of Excellent Undergraduate/Master Thesis
  1. Kaoru Hayakawa:
     Partial Platform Attestation,
     73rd National Convention of IPSJ, Certificate of Excellent Undergraduate Thesis (2011).
• IEICE 2011 Fellow
  1. Shuichi Sakai:
     Research and Development of the New Generation Computer Systems,
     (2011.9.14).
• IEEE IEEE Computer Society Japan Chapter IEEE Computer Society Japan Chapter Young Author Award 2011
  1. Ryota Shioya:
     Register Cache System not for Latency Reduction Purpose,
     IEEE/ACM International Symposium on Microarchitecture (MICRO 43),
     IEEE Computer Society Japan Chapter Young Author Award 2011(2011).

thesis

• Mater Thesis
  1. Hiroshi Toi:
     Dynamic Taint Propagation Based on Dynamic String Conversion Detection,
     Master thesis, Dept. of Information and Communication Eng, the University of Tokyo, (2012).
  2. Naruki Kurata:
     Switch-on-Future-Event: A New Multithreaded Architecture for Single Programs,
     Master thesis, Dept. of Information and Communication Eng, the University of Tokyo, (2012).
  3. Satoshi Arima:
     Timing-Fault-Tolerant Out-of-Order Processor,
     Master thesis, Dept. of Information and Communication Eng, the University of Tokyo, (2012).