STRAIGHT: Highly Efficient General-purpose Processor Architecture
We are researching the novel computer-architecture that promotes the further improvement of processors’ efficiency and performance, which is named “STRAIGHT.” The proposed architecture features a unique instruction set that does not cause register overwriting, so that even programs that do not fit GPUs or domain-specific accelerators can be executed flexibly, quickly, and efficiently. The evaluation of the prototype soft-core, which is achieved by integrating the instruction set specification, the compiler algorithm, the hardware execution model, and the design description (RTL), shows that STRAIGHT has superior performance and characteristics to the existing RISC soft-cores of the same scale as expected. Presently, we are conducting the development to make the specification and the reference design open so that many users and companies can try and deploy this new processor architecture.
- Satoshi Mitsuno, Junichiro Kadomoto, Toru Koizumi, Ryota Shioya, Hidetsugu Irie, Shuichi Sakai: “A High-Performance Out-of-Order Soft Processor Without Register Renaming”, Int. Conf. on Field-Programmable Logic and Applications, Sep., 2020. (accepted)
- Toru Koizumi, Satoshi Nakae, Akifumi Fukuda, Hidetsugu Irie, Shuichi Sakai: “Reduction of instruction increase overhead by STRAIGHT compier”, Int. Workshop on Computer Systems and Architectures, pp.92–98, Nov., 2018.
- Hidetsugu Irie, Toru Koizumi, Akifumi Fukuda, Seiya Akaki, Satoshi Nakae, Yutaro Bessho, Ryota Shioya, Takahiro Notsu, Katsuhiro Yoda, Teruo Ishihara, Shuichi Sakai: “STRAIGHT: Hazardless Processor Architecture Without Register Renaming”, Int. Symp. on Microarchitecture, pp.121–133, Oct., 2018.